Question on “Hitting the memory wall, implications of the obvious”

Question

I'm reading through a short paper about hitting the memory wall and I'm struggling to understand how exactly said wall will be hit.

The equation for average access time is fairly simple Tavg = p x Tc + (1-p) x Tm. (Tc = time for cache, Tm = time for DRAM mem, P = probability of cache hit)

What I don't understand is how as Tc and Tm diverge, we hit a wall. I recognize that Tc grows exponentially faster than Tm eventually Tm will play little to no role in access time, but it seems like me that average access time would then just continually increase. I can't seem to understand how a wall is hit.

Would anyone with a sharper mind or keener eye than mine help me to understand this concept?